"DVC" standards offer standards for digital VTRs (video tape recorders) for data compression and recording of video data (see, for example, pages 48-55 of the National Technical Report, Vol. 41, No. Apr. 2, 1995). One such DVC standard is the SD-DVC standard for the recording of video signals having normal broadcast-level resolution (SD signals).
According to this standard, in the so-called 525/60 format (a format equivalent to the NTSC signal format), the video signal is sampled at a 4:1:1 sampling ratio (One Cb sample and one Cr sample for every four Y samples). The luminance (Y) signal has 720 active picture elements ("pels" or "pixels") in the horizontal direction and 480 active lines per frame in the vertical direction. With this sampling ratio, the chrominance signals (Cb and Cr), have 180 active pels in the horizontal direction, but in the vertical direction, they have the same 480 active lines per frame as the luminance signal.
FIG. 3(a) illustrates the structure of a basic unit of data, for processing purposes, formatted according to the SD-DVC standard. As shown in this figure, a basic data unit is made up of four luminance signal blocks Y0-Y3 and two chrominance blocks Cb and Cr. Each of these basic blocks is made up of coded data developed by taking the coefficient data obtained by performing discrete cosine transformation (DCT) of the sampled data in 8.times.8-pel units, and performing optimum quantization by code volume control, and variable length coding (VLC) on this coefficient data.
Each of the blocks in FIG. 3(a) (Y0, Y1, Y3, Cr, and Cb) is made up of a "D" area and an "A" area. The "D" areas (D0-D5) contain data for the dc (direct current) component of each block after DCT-transformation, as well as ancillary data for encoding and decoding. The "A" areas (A0-A5) contain data for the ac (alternating current) components of each block. The A0-A5 areas, however, are not necessarily used separately. Area A0, for example, might be able to hold all of the ac component data for block Y0 and still have some empty space left over, while block Y2 may have more ac component data than will fit into area A2. In this situation, the block Y2 data overflow would be packed into the empty space in area A0.
Also, another standard, hereinafter referred to as "DIGITAL-S," has been proposed for recording and playback of video signals sampled at 50 Mbps (4:2:2), or twice the SD-DVC rate. This is accomplished by providing two SD-DVC-standard signal processing channels in parallel.
FIG. 3(b) shows the structure of a basic unit in the DIGITAL-S standard. This basic unit is made up of two units, each of which is equivalent to the basic unit of FIG. 3(a) without its block Y1 and Y3 data. The reason for this is that although two 4:1:1 signal processing circuits are used, thus constituting an 8:2:2 unit overall, the video signal being processed is a 4:2:2 signal. Therefore, the block Y0, Y1, Cr0, and Cb0 data is placed in areas D0-D3 and A0-A5, and the block Y2, Y3, Cr1, and Cb1 data is placed in areas D4-D7 and A6-A11. The shaded areas V1-V4 are unused areas.